1. Field of the Invention
This invention relates to pulse-width modulation in a multi-level power supply. Such a power supply applies readily to motor drive and power supply applications that utilize inverters or cells with low-voltage rated semi-conductors to produce high voltages or high currents.
2. Description of Prior Art
Pulse-width-modulation (PWM) is commonly used in inverters for variable speed drives and power supplies and other applications. Single inverters use a single triangular carrier to generate the PWM signals for controlling the semiconductor devices. On the other hand, multi-level inverters, such as the one disclosed in U.S. Pat. No. 5,625,545 (Hammond), which is incorporated herein by reference, use multiple, phase-shifted triangular carriers to improve the output waveform to the load. Hammond suggests the use of N phase-shifted carriers, where each carrier is phase-shifted from its neighbors by 180xc2x0/N and where N is the number of ranks per phase (i.e., the number of series-connected inverters per phase). Thus, for a three phase system there are a total of 3N cells. With the assignment of phase shifts disclosed in Hammond, the three cells in a given rank (i.e., one cell from each phase) share the same triangular carrier.
FIG. 1 shows the power circuit of a cell, such as was disclosed in U.S. Pat. No. 5,625,545 (Hammond). Each cell receives power from a three-phase source. The diode-bridge rectifier converts the input ac voltage to a substantially constant dc voltage that is supported by capacitors connected across the rectifier output. The output stage is an H-Bridge inverter that consists of two poles, a left pole and a right pole, each with two devices. The inverter transforms the dc voltage across the dc capacitors to an ac output using PWM of the semiconductor devices. This invention is an improvement on Hammond that relates to the switching of these devices; hence, only the output stage of these cells will be discussed hereinafter.
The two devices in a particular pole receive complementary gating signals; i.e. when the upper device is gated ON, the lower device is gated OFF and vice versa. In this description we define the pole-gating signal to be a means of describing the gating signals of both the (upper and lower) devices in that pole. When the pole-gating signal is high, the upper device is gated ON and the lower device is gated OFF, and vice versa. The gating signals for a pole are determined by comparing the voltage command with the triangular carrier, while the gating signals for the other pole are determined by comparing the same voltage command with the negated triangular carrier. This is shown in FIG. 2 where the output of each pole is shown separately. The cell output is the difference of the two gating signals scaled by the DC voltage.
The cell output voltage has three levels, each of which corresponds to a different voltage at the output terminals of the cell. These levels are described below.
1. The HIGH level corresponds to an output voltage equal to +Vdc, where Vdc is the total dc bus voltage supported by the capacitors.
2. The ZERO level corresponds to zero voltage at the output of the cell. 3. The LOW level corresponds to an output voltage equal to xe2x88x92Vdc. Thus the cell output is different from a six-switch inverter (that is traditionally utilized in low voltage drives) that has only two-levels in the output phase voltage waveform. A circuit topology that results in an output waveform with more than two levels is considered as a multi-level topology.
FIG. 3 shows the three-phase voltage references and triangular carrier that are required by Hammond to generate the PWM signals for one rank of cells (i.e., one cell from each phase). Note that the same triangular carrier (and its negated counterpart) is used for all the three cells in the rank. From this figure, it can also be observed that there are distinct 60xc2x0 intervals (or ⅙th of the period of the phase-voltage command as shown in FIG. 3) during which two phase-voltage commands have the same magnitude but opposite signs. These intervals are marked at the top of FIG. 3. For example, the comment |A|=|B| in the first interval, means that the voltage commands for phases A and B have the same magnitude during that interval. During these intervals the transition (i.e., switching) of one cell""s left pole gating signal coincides with the transition of the second cell""s right pole gating signal. This is because both the carrier signal and its inverted value are used in generating the left pole and right pole gating signals for every cell (or H-bridge inverter). The result is a simultaneous change in opposite directions of the outputs of two cells that receive phase-voltage commands with equal magnitudes. This leads to an undesirable step of twice the cell dc bus voltage in the line-to-line voltage. Moreover, these steps occur when the output line-to-line voltage of the power supply is going through its peak value. FIG. 3 also shows examples of instances (encircled) where the outputs of two cells from different phases change state simultaneously. This process repeats every 60xc2x0 in the two phases that have equal magnitudes of phase voltage command values.
The total output voltage of each phase of the power supply is generated by the addition of all the cell output voltages in that phase. As described earlier, the cells in a given phase receive phase-shifted triangular carriers to increase the number of voltage levels in the output voltage waveform. The number of levels in the line-to-line output voltage waveform is given by (4N+1), where N is the number of ranks in the power supply.
A power supply with a total of 9-cells (i.e., three phases with three cells per phase, or N=3) is considered as an example. The phase shift for each cell is shown in Table 1. According to Hammond, all cells in a given rank receive the same carrier. FIG. 4 shows the total phase voltage of one phase of the power supply. Notice that there are 13 distinct levels in the line-to-line output voltage. The effect of a simultaneous change in opposite directions of the outputs of two cells that receive phase-voltage commands with equal magnitudes can be clearly seen in the voltage waveform. Double steps are observed at the peak of the voltage waveform. Such effects increase the peak output voltage applied to the load. In addition, when long cables are used between the power supply and the load, these double steps are amplified at the load terminals by travelling wave effects resulting in increased voltage distortion. Also shown in FIG. 4 is an output current waveform that results when a 9-cell power supply is connected to a motor with low leakage inductance. A motor such as this is considered to amplify the effect of harmonics for comparison purposes.
It would therefore be desirable to eliminate the simultaneous changes of the gate signals in the cells to eliminate or reduce the double steps observed in the line to-line voltage at the peak of the voltage waveform.
This invention presents a new modulation technique for multi-level inverters that generate an AC output. The resulting drive waveforms exhibit lower peak voltages and reduced harmonic distortion. The result is an improvement in the characteristics of the voltage and current waveforms over Hammond.